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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Peng Li Gomez, K. Lilja, D.J. |
| Copyright Year | 2013 |
| Description | Author affiliation: Univ. of Minnesota, Minneapolis, MN, USA (Lilja, D.J.) || Seagate Technol., Shakopee, MN, USA (Peng Li; Gomez, K.) |
| Abstract | Energy consumption is a fundamental issue in today's data centers as data continue growing dramatically. How to process these data in an energy-efficient way becomes more and more important. Prior work had proposed several methods to build an energy-efficient system. The basic idea is to attack the memory wall issue (i.e., the performance gap between CPUs and main memory) by moving computing closer to the data. However, these methods have not been widely adopted due to high cost and limited performance improvements. In this paper, we propose the storage processing unit (SPU) which adds computing power into NAND flash memories at standard solid-state drive (SSD) cost. By pre-processing the data using the SPU, the data that needs to be transferred to host CPUs for further processing are significantly reduced. Simulation results show that the SPU-based system can result in at least 100 times lower energy per operation than a conventional system for data-intensive applications. |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 258631 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781479913657 |
| DOI | 10.1109/HPEC.2013.6670317 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-09-10 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Energy consumption Parallel computing SSD NAND Flash Ash Computer architecture Logic gates Parallel processing OpenCL Flash memories Coprocessors |
| Content Type | Text |
| Resource Type | Article |
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