NDLI: FRIT based PI tuning for speed control of PMSM using FPGA for high frequency SiC MOSFET inverter

Content Provider	IEEE Xplore Digital Library
Author	Harahap, C.R. Hanamoto, T.
Copyright Year	2015
Description	Author affiliation: Grad. Life Sci. & Syst. Eng., Kyushu Inst. of Technol., Kitakyushu, Japan (Harahap, C.R.; Hanamoto, T.)
Abstract	This paper proposes PI gain controller parameters tuning by using Fictitious Reference Iterative Tuning (FRIT) method for speed control of PMSM using FPGA for high frequency SiC MOSFET Inverter. PI controller parameters can be tuned by using FRIT without mathematical model of plant from one-shot experimental data. Particle Swarm Optimization (PSO) is utilized for the optimization of FRIT. The inverter using SiC MOSFET is presented to achieve high - frequency operation up to 100 kHz with a switching PWM technique. As the result, high response and good stability control system of PMSM can be achieved so that speed response follows the ideal response for step response and disturbance response. Digital hardware control based on FPGA is used to maximize the switching frequency of SiC MOSFET inverter. Finally, an experimental system is set up and some experimental results are demonstrated.
Starting Page	1
Ending Page	6
File Size	2271299
Page Count	6
File Format	PDF
e-ISBN	9781467369022
DOI	10.1109/ICIEV.2015.7333974
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-15
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	PI control PMSM Switches Drives Pulse width modulation Fictitious reference iterative tuning Inverters Speed control Frequency synchronization SiC MOSFET Inverter Frequency control
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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