NDLI: D_EDF: An efficient scheduling algorithm for real-time multiprocessor system

Content Provider	IEEE Xplore Digital Library
Author	Thakor, D. Shah, A.
Copyright Year	2011
Description	Author affiliation: Department of Computer Engineering, BVM Engineering College, Vallabh Vidhyanagar-388120, Gujarat, India (Thakor, D.) \|\| Department of Information Technology, G. H. Patel Engineering College, Vallabh Vidhyanagar-388120, Gujarat, India (Shah, A.)
Abstract	A scheduling algorithm decides a schedule for a set of tasks. There are numbers of algorithm for scheduling tasks on a processor. Some of these algorithms are used for scheduling tasks on multiprocessor system either under the partitioning scheme or under the global scheduling scheme. The most common scheduling algorithms are: Earliest Deadline First (EDF) and Least Laxity First (LLF). They are optimal scheduling algorithms for single processor system, but problem arises when algorithms are used for multiprocessor system. In this paper, we have proposed a new algorithm, D_EDF. D_EDF scheduling algorithm overcomes the limitations of dynamic algorithm during overloaded conditions. The proposed algorithm D_EDF, simulated and tested for independent, preemptive, periodic tasks on tightly coupled real-time multiprocessor system under global scheduling. The performance is measured in terms of Success Ratio and Effective CPU Utilization. From experiments and result analysis it concludes that the proposed algorithm is very efficient in both underloaded and overloaded conditions. It performs always better than conventional EDF algorithm. The algorithm proposed in the paper performs quite well during overloaded conditions.
Starting Page	1044
Ending Page	1049
File Size	203078
Page Count	6
File Format	PDF
ISBN	9781467301275
e-ISBN	9781467301268
DOI	10.1109/WICT.2011.6141392
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-11
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Real time systems Algorithm design and analysis Scheduling algorithms Real-Time System Heuristic algorithms D_EDF EDF Optimal scheduling LLF DM Scheduling
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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