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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jeppu, N.Y. Jeppu, Y. Murthy, N. |
| Copyright Year | 2015 |
| Description | Author affiliation: Comput. Eng., Nat. Inst. of Technol. Karnataka, Mangalore, India (Jeppu, N.Y.) || Software, Moog India Technol. Center, Bangalore, India (Jeppu, Y.; Murthy, N.) |
| Abstract | Flight control law software have errors. Some are found during the extensive testing and certification process and others pass through causing accidents. The testing of flight control software indicates that the code and the model match. But it is very difficult to ensure if the model was correct in the first place. Model checkers like Mathworks Simulink Design Verifier check the models against formally defined conditions and system behavior. The tool can come up with counterexamples that can fail an assertion or proof. A study is done on how easy or difficult it is to teach engineering students this formal process. The problem statement, the Simulink models and the outcome of the study in terms of advantages and disadvantages of using Simulink Design Verifier is highlighted in this preliminary study. |
| Starting Page | 378 |
| Ending Page | 383 |
| File Size | 517763 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781479971657 |
| DOI | 10.1109/IIC.2015.7150771 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-05-28 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Model checking Delays Mathematical model MATLAB Software tools Aerospace control Testing Embedded software Formal verification |
| Content Type | Text |
| Resource Type | Article |
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