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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | AnandKumar, K.M. Akash, S. Ganesh, D. Christy, M.S. |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. of CSE, Easwari Eng. Coll., Chennai, India (AnandKumar, K.M.; Akash, S.; Ganesh, D.; Christy, M.S.) |
| Abstract | Future generation computer architectures are endeavoring to achieve high performance without compromise on energy efficiency. In a multiprocessor system, cache miss degrades the performance as the miss penalty scales by an exponential factor across a shared memory system when compared to general purpose processors. This instigates the need for an efficient cache replacement scheme to cater to the data needs of underlying functional units in case of a cache miss. Minimal cache miss improves resource utilization and reduces data movement across the core which in turn contributes to a high performance and lesser power dissipation. Existing replacement policies has several issues when implemented in a heterogeneous multi-core system. The commonly used LRU replacement policy does not offer optimal performance for applications with high dependencies. Motivated by the limitations of the existing algorithms, we propose a hybrid cache replacement policy which combines Least Recently Used (LRU) and Least Frequently Used (LFU) replacement policies. Each cache block has two weighing values corresponding to LRU and LFU policies and a cumulative weight is calculated using these two values. Conducting simulations over wide range of cache sizes and associativity, we show that our proposed approach has shown increased cache hit to miss ratio when compared with LRU and other conventional cache replacement policies. |
| Starting Page | 594 |
| Ending Page | 599 |
| File Size | 633476 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781479930784 |
| e-ISBN | 9781479930807 |
| DOI | 10.1109/ICACCI.2014.6968209 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-09-24 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Time-frequency analysis Resource utilization Multi-core Cache miss Cache Replacement Libraries |
| Content Type | Text |
| Resource Type | Article |
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