NDLI: Using advanced FPGA SoC technologies for the design of industrial control applications

Content Provider	IEEE Xplore Digital Library
Author	Economakos, C. Kiokes, G. Economakos, G.
Copyright Year	2015
Description	Author affiliation: Hellenic Air Force Acad., Athens, Greece (Kiokes, G.) \|\| Dept. of Autom. Eng., Technol. Educ. Instn. of Sterea Ellada, Psahna, Greece (Economakos, C.) \|\| Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece (Economakos, G.)
Abstract	Modern industrial control systems must offer performance, flexibility and reliability. On the same time, they need to reach the market as early as possible and at low cost. Finally, they need to operate as embedded devices with low power budget. On top of that, the algorithms that they implement are getting even more sophisticated, advanced and demanding. To cope with all these diverse requirements, control system designers are moving with fast steps to the digital hardware design field and specifically, FPGAs, System-on-Chip architectures and productivity improving methodologies like High-Level Synthesis, which uses C/C++ as an abstract hardware description language. In this paper, using these tools, the implementation of 3 control algorithms is shown, the classical PID algorithm, a Fuzzy Logic Controller (FLC) and an Adaptive or Tuning Fuzzy Logic Controller (TFLC). The novelty of the proposed approach is that through specific coding and compiler directives, the C/C++ input descriptions are automatically implemented as advanced multicore architectures (3 most advanced of them are put to extensive experimentation and compared), which execute up to 500K algorithm iterations in less that 1 sec, taking advantage of an embedded ARM family microcontroller and common memory blocks found in the underlying FPGA implementation device. This is a substantial performance improvements and a high productivity boost, with very promising future extension capabilities.
Starting Page	1
Ending Page	6
File Size	465543
Page Count	6
File Format	PDF
e-ISBN	9781467393119
DOI	10.1109/IISA.2015.7388129
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-07-06
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Productivity Multicore Architectures FPGAs Microcontrollers High-Level Synthesis Industrial control SoC Computer architecture Digital Control Hardware Software Field programmable gate arrays
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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