NDLI: A novel hardware Gaussian noise generator using Box-Muller and CORDIC

Content Provider	IEEE Xplore Digital Library
Author	Yuting Wang Zhisong Bie
Copyright Year	2014
Description	Author affiliation: Key Lab. of Univ. Wireless Commun., Univ. of Posts & Telecommun., Beijing, China (Yuting Wang; Zhisong Bie)
Abstract	A novel hardware Gaussian noise generator based on the Box-Muller method and the Coordinate Rotation Digital Computer (CORDIC) Algorithm is presented. The main novelties of this work are using Modified CORDIC Algorithm with Domain Folding (MDF-CORDIC) algorithm and expanding the range of convergence of the CORDIC algorithm to improve the operation accuracy for the elementary functions involved in the Box-Muller method. Due to the modified CORDIC algorithm, two 16-bit highly accurate noise samples are generated every clock cycle and the accuracy can reach $10^{-7}$ while the conventional is $10^{-3}.$ The noise generator can also accurately model a true Gaussian probability density function even at high σ values. This design is implemented on a Xilinx XC4VLX15 Virtex-4 device field-programmable gate array (FPGA) at 155 MHz; it takes up 5% of the device and produces 155 million samples per second.
Starting Page	1
Ending Page	6
File Size	262262
Page Count	6
File Format	PDF
ISBN	9781479973392
DOI	10.1109/WCSP.2014.6992107
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-10-23
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Accuracy Computer architecture Hardware Mathematical model Equations Convergence
Content Type	Text
Resource Type	Article

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