NDLI: Design and FPGA implementation of sequential digital FIR filter using microprogrammed controller

Content Provider	IEEE Xplore Digital Library
Author	Qasim, S.M. BenSaleh, M.S. Bahaidarah, M. AlObaisi, H. AlSharif, T. AlZahrani, M. AlOnazi, H.
Copyright Year	2012
Description	Author affiliation: King Abdulaziz University, Department of Electrical and Computer Engineering, Jeddah, Saudi Arabia (AlSharif, T.; AlZahrani, M.) \|\| King Saud University, Department of Electrical Engineering, College of Engineering, Riyadh, Saudi Arabia (AlOnazi, H.) \|\| King Abdulaziz City for Science and Technology, National Center for Electronics, Communications and Photonics, Micro Sensors and Devices Division, Riyadh, Saudi Arabia (Qasim, S.M.; BenSaleh, M.S.; Bahaidarah, M.; AlObaisi, H.)
Abstract	Digital finite impulse response (FIR) filters play a very important role in digital signal processing (DSP) applications ranging from image and video processing to wireless communication. Digital FIR filter is primarily composed of multipliers, adders and delay elements. Several techniques have been reported in the open literature to implement digital FIR filters using Field Programmable Gate Array (FPGA). This paper also presents an FPGA implementation of FIR filter but using a novel microprogrammed controller based design approach. The proposed controller controls the sequence of operation of the filter. To demonstrate the technique, design of a sequential 4-tap digital FIR filter based on the microprogrammed controller is presented. The proposed FIR filter is coded in VHDL using modular design approach and implemented in Spartan-3E FPGA. Performance evaluation is done based on the implementation results obtained through Xilinx ISE tool.
Starting Page	1002
Ending Page	1005
File Size	1369561
Page Count	4
File Format	PDF
ISBN	9781467320160
ISSN	2157023X
e-ISBN	9781467320177
DOI	10.1109/ICUMT.2012.6459641
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-10-03
Publisher Place	Russia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Architecture Simulation Computer architecture Digital signal processing Finite impulse response filter Transversal filters Field programmable gate arrays
Content Type	Text
Resource Type	Article

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