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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yang Liu Qing Cheng Li Jia Xing Liu Jie Ma |
| Copyright Year | 2009 |
| Description | Author affiliation: Colloge of Information Technical Science, Nankai University, Tian Jin, China (Yang Liu; Qing Cheng Li; Jia Xing Liu; Jie Ma) |
| Abstract | Hardware Software partitioning is one of the most significant part of Hardware Software co-design of embedded systems, which is directly related to performance and cost. A lot of works have been done such as the simulated annealing algorithm, greedy algorithm and evaluation algorithm. In this paper, a new hardware software partitioning method based on Immune Algorithm was introduced. The model of the embedded system was constructed by Improved Directed Acyclic Graph (IDAG) to obtain the objective function for hardware/software partitioning. Compared with other algorithm, it could provide an effective tool for measuring the performance of different objective functions, and improve the designing efficiency. Also, a proof was given to show the algorithm had weak convergence in probability. |
| Starting Page | 4 |
| Ending Page | 8 |
| File Size | 119568 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424447541 |
| DOI | 10.1109/ICICISYS.2009.5358254 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-11-20 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Greedy algorithms Costs Hardware Software co-design Software algorithms Software performance Immune Algorithm Partitioning algorithms Convergence Embedded software Embedded system Simulated annealing Convergence Property Hardware Hardware Software Partitioning |
| Content Type | Text |
| Resource Type | Article |
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