NDLI: A High Efficient Common IPC for LTE Layer1 Multi-core DSP/SoC System

Content Provider	IEEE Xplore Digital Library
Author	Hao Xiang Xiaogen Jiang Qunfeng Shang
Copyright Year	2014
Description	Author affiliation: Wireless Res. Dept., Alcatel-Lucent Shanghai Bell, Shanghai, China (Hao Xiang; Xiaogen Jiang; Qunfeng Shang)
Abstract	Multi-core digital signal processor (DSP) and system on chip (SoC) are widely used in LTE baseband these years. A companion paper (Hao Xiang et at., 2013) [1] presented a kind of 3 layers multi-core DSP/SoC software architecture, and mentioned the common IPC is the key for this flexible architecture. This common IPC is detailed in this paper. LTE system has hundreds of configurations from different antenna numbers, bandwidth and Downlink Uplink ratios combinations. The task-core mapping should always be updated according to different configuration scenario. However, this update will seriously impact the software architecture, if the task-core mapping is visible to the architecture. This paper presents a shared memory based IPC. It automatically adapts to the different task-core mapping scenarios, provides a common and transparent IPC channel to the upper layers. Based on this common IPC, each task can be flexibly mapped to any core dynamically. And this dynamic mapping is transparent to the upper layers, so it hasn't impact on the software architecture any more. This paper makes several contributions to the common IPC development. The first one is the shared memory self-healing circular buffer design. This shared memory based design supports zero-copy, so as to improve the IPC efficiency. This design also supports self-check and self-recovery, so as to achieve the self-healing reliability. The second one is the inter-core N senders - 1 receiver IPC channel design. The third one is the IPC commonizing and optimization for multi-core system. Our evaluation shows the advantages of this common IPC. 1) It is common and transparent to upper layers, so it supports the flexibly task-core mapping. 2) It is a high efficient IPC. After the optimization, in the 256 bytes message inter-core IPC case, it is 4.5 times faster than the same IPC in SmartOS.
Starting Page	400
Ending Page	405
File Size	166236
Page Count	6
File Format	PDF
e-ISBN	9781479962365
DOI	10.1109/CyberC.2014.76
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-10-13
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	DSP Baseband Multicore processing Software architecture Multi-core SoC Digital signal processing Receivers Common and transparent IPC Portability System-on-chip LTE
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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