NDLI: A High-Performance Scalable Computing System on the RapidIO Interconnect Architecture

Content Provider	IEEE Xplore Digital Library
Author	Yong Zhang Yong Wang Ping Zhang
Copyright Year	2010
Abstract	In order to meet the demanding requirements of calability, adaptability and computational capability of next-generation signal-processing system, a flexible and high performance signal-processing odule based on Serial RapidIO (SRIO) interconnect and Advanced Mezzanine Card (AMC) modules is developed. RapidIO is a packet-switched nterconnect intended primarily as an intra-system interface, allowing chip-to-chip and board-to-board communications at 10 Gigabit per second performance levels. The AMC specification is defined by PCI Industrial Computer Manufacturer Group (PICMG) and mainly covers the base-level requirements for a wide-range of high-speed mezzanine cards optimized for, but not limited to, Advanced Telecommunications Computing Architecture (ATCA) Carriers systems. With this versatile module, massively parallel multi-processor computing system is feasible. A prototype of 12 modules is introduced and an application of this computing system in MIMO-OFDM system is covered.
Starting Page	288
Ending Page	292
File Size	602812
Page Count	5
File Format	PDF
ISBN	9781424484348
DOI	10.1109/CyberC.2010.59
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-10-10
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Connectors Interconnect Ethernet networks Backplanes Serial rapidIO AMC Signal processing Fabrics Hardware Topology ATCA
Content Type	Text
Resource Type	Article

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