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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Oza, S. Devashrayee, N.M. |
| Copyright Year | 2009 |
| Abstract | The folding and interpolating ADC has speed advantage similar to flash ADC with reduced complexity. The folding amplifier can be used to produce more than one zero-crossing point to reduce required number of comparators. This paper presents simple low voltage, low power folding amplifier with folding factor=4 for folding and interpolating ADC. The design is implemented using 0.13um technology at 1.5V supply voltage. The simulation results are compared with voltage mode (conventional differential pair based) folding amplifier and current steering folding amplifier. In order to achieve low power, glitches are reduced. The simulation result indicates that the proposed folding amplifier work faster compared to other two designs. |
| Starting Page | 178 |
| Ending Page | 182 |
| File Size | 459947 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424451043 |
| DOI | 10.1109/ARTCom.2009.68 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-10-27 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuits Quantization Parallel architectures Current Steering Analog-digital conversion Low Voltage Low voltage Interpolation Folding Amplifier Low Power Signal processing Differential amplifiers Preamplifiers Communications technology Differential Pair A/D Converter |
| Content Type | Text |
| Resource Type | Article |
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