NDLI: Using Test and Diagnosis to Enable Tomorrow's Robust Systems

Content Provider	IEEE Xplore Digital Library
Author	Blanton, S.
Copyright Year	2010
Abstract	Producing reliable, integrated systems is becoming extremely difficult due to the increasing variability and uncertainty inherent in advancing fabrication technologies; the worsening effects of various wear-out mechanisms; and environmental disturbances (e.g., soft errors due to radiation). Solutions to this problem centering on traditional approaches involving redundant resources are likely to be impractical due to the negative impact on power and performance. Because of this trend, it is widely believed that approaches for enabling chips to self-X (where X = monitor, diagnose, calibrate, compensate, heal, etc.) will be needed to ensure reliable operation over a chip’s expected lifetime. In collaboration with Prof. Mitra of Stanford University, our work in this area is focused on developing methodologies that enable integrated systems to self-monitor, self-diagnose, and self-compensate for various non-idealities. In this talk, I will describe how state-of-the-art diagnosis of failing ICs today is used today to extract valuable information about design, manufacturing and test itself. Although tremendously beneficial, a fault simulator, significant amounts of design data, and powerful computer servers are needed to perform diagnosis. It is therefore infeasible to implement traditional effect-cause diagnosis within a system. We are therefore developing efficient cause-effect (i.e., fault dictionary) based approaches for performing in-system diagnosis. I will conclude the talk by describing approaches for developing efficient fault dictionaries for on-chip implementation.
Starting Page	25
Ending Page	25
File Size	80771
Page Count	1
File Format	PDF
ISBN	9781424489794
DOI	10.1109/ISED.2010.63
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-12-20
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computers Dictionaries System-on-a-chip Data mining Servers Biomedical monitoring Integrated circuit modeling
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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