NDLI: Genetic algorithm based approach for segmented testing

Content Provider	IEEE Xplore Digital Library
Author	Xiaoxin Fan Reddy, S.M. Senling Wang Kajihara, S. Sato, Y.
Copyright Year	2011
Description	Author affiliation: Dept. of ECE, University of Iowa (Xiaoxin Fan; Reddy, S.M.) \|\| Dept. of CSE, Kyushu Institute of Technology (Senling Wang; Kajihara, S.; Sato, Y.)
Abstract	Segmented testing, in which a set of test patterns are partitioned into several segments, has been shown to be applicable for on-line testing as it can shorten the mean time to fault detection. One problem that exists for segmented testing is how to partition the set of tests so that the detection latency can be minimized. In this paper, we first propose a method to compute a lower bound of detection latency. Then we present a genetic algorithm (GA) based procedure to partition a given test set into several test segments aiming to reduce the detection latency. Experimental results on ISCAS'89 benchmark circuits demonstrate that the proposed approach can effectively reduce detection latency.
Starting Page	85
Ending Page	90
File Size	1180758
Page Count	6
File Format	PDF
ISBN	9781457703744
e-ISBN	9781457703751
e-ISBN	9781457703737
DOI	10.1109/DSNW.2011.5958841
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-27
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Upper bound Fault detection Genetic algorithm On-line testing Circuit faults Reliability Detection latency Segmented testing Biological cells Testing Genetic algorithms
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A test generator for segment delay faults

Fault section diagnosis of distribution network based on improved genetic algorithm

Generating test patterns for fault detection in combinational circuits using genetic algorithm

A genetic approach to test generation for logic circuits

A MCM Interconnect Test Generation Optimization Scheme Based on Ant Algorithm and Genetic Algorithm

Optimization of Frequency Testing Stimulus Based on Improved Genetic Algorithm

IDDQ test generation for BF fault in combinational circuit based on genetic algorithms

Deterministic method of genetic algorithms of test generation for digital systems verification

A genetic algorithm for probe testing problem on high-density PCB

Genetic algorithm based approach for segmented testing

Similar Documents

A test generator for segment delay faults

Fault section diagnosis of distribution network based on improved genetic algorithm

Generating test patterns for fault detection in combinational circuits using genetic algorithm

A genetic approach to test generation for logic circuits

A MCM Interconnect Test Generation Optimization Scheme Based on Ant Algorithm and Genetic Algorithm

Optimization of Frequency Testing Stimulus Based on Improved Genetic Algorithm

IDDQ test generation for BF fault in combinational circuit based on genetic algorithms

Deterministic method of genetic algorithms of test generation for digital systems verification

A genetic algorithm for probe testing problem on high-density PCB

Genetic algorithm based approach for segmented testing