NDLI: Design of an ultra low power CMOS pixel sensor for a future neutron personal dosimeter

Content Provider	IEEE Xplore Digital Library
Author	Zhang, Y. Hu-Guo, C. Husson, D. Hu, Y.
Copyright Year	2011
Description	Author affiliation: Institut Pluridisplinaire Hubert Curien (IPHC), University of Strasbourg, CNRS/IN2P3, 23 Rue du Loess, BP 28, 67037 Strasbourg, France (Zhang, Y.; Hu-Guo, C.; Husson, D.; Hu, Y.)
Abstract	Despite a continuously increasing demand, neutron electronic personal dosimeters (EPDs) are still far from being completely established because their development is a very difficult task. A low-noise, ultra low power consumption CMOS pixel sensor for a future neutron personal dosimeter has been implemented in a 0.35 μm CMOS technology. The prototype is composed of a pixel array for detection of charged particles, and the readout electronics is integrated on the same substrate for signal processing. The excess electrons generated by an impinging particle are collected by the pixel array. The charge collection time and the efficiency are the crucial points of a CMOS detector. The 3-D device simulations using the commercially available Synopsys-SENTAURUS package address the detailed charge collection process. Within a time of 1.9 μs, about 59% electrons created by the impact particle are collected in a cluster of 4×4 pixels with the pixel pitch of 80 μm. A charge sensitive preamplifier (CSA) and a shaper are employed in the frond-end readout. The tests with electrical signals indicate that our prototype with a total active area of 2.56×2.56 $mm^{2}$ performs an equivalent noise charge (ENC) of less than 400 $e^{−}$ and 314 μW power consumption, leading to a promising prototype.
Starting Page	1
Ending Page	7
File Size	1385337
Page Count	7
File Format	PDF
ISBN	9781457709258
e-ISBN	9781457709272
DOI	10.1109/ANIMMA.2011.6172973
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-06
Publisher Place	Belgium
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Noise Detectors Neutrons Capacitance Preamplifiers CMOS integrated circuits Transistors
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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