NDLI: Proposal of a methodology to enhance the teaching of asynchronous digital systems design

Content Provider	IEEE Xplore Digital Library
Author	Oliveira, D.L. Alles, N. Faria, L.A. Bompean, D. Curtinhas, T.
Copyright Year	2011
Description	Author affiliation: Inst. Tecnol. de Aeronaut., São José dos Campos, Brazil (Oliveira, D.L.; Alles, N.; Faria, L.A.; Bompean, D.; Curtinhas, T.)
Abstract	Synchronous digital systems have been presenting serious problems of implementation in DSM (deep sub-micron) VLSI technology, for which the asynchronous paradigm has become an interesting alternative. Unfortunately, the topic of synthesis of asynchronous digital systems has been ignored or presents only a few numbers of teaching classes in most courses in electrical engineering, due the difficulty of different styles of asynchronous design, what requires many hours of classroom teaching. In this paper we propose a methodology for synthesis of asynchronous systems that requires just few hours of classroom teaching, being interesting to be incorporated in the subject of logic design. Starting from the RTL (Register Transfer Level) description of synchronous systems, the proposed method synthesizes the asynchronous system in the “decomposition” style, which is defined by XBM_AFSM (extended burst-mode asynchronous finite state machine) + datapath synchronous. A simple procedure is used to convert the specification of SFSM to the XBM specification, which describes the XBM_AFSM. Through a case study, it is shown the simplicity of the methodology, resulting in high-performance circuits.
Starting Page	59
Ending Page	65
File Size	1799728
Page Count	7
File Format	PDF
ISBN	9781457712586
e-ISBN	9781457712593
DOI	10.1109/ICEED.2011.6235361
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-07
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	TV Hazard logic STG specification Finite state machine XBM specification Very large scale integration RTL description
Content Type	Text
Resource Type	Article

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