NDLI: A sliding IF receiver for mm-wave WLANs in 65nm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Bozzola, S. Guermandi, D. Vecchi, F. Repossi, M. Pozzoni, M. Mazzanti, A. Svelto, F.
Copyright Year	2009
Description	Author affiliation: Università degli Studi di Pavia, via Ferrata 1, 27100, Italy (Bozzola, S.; Vecchi, F.; Svelto, F.) \|\| Broadcom Netherlands B.V., The Netherlands (Guermandi, D.) \|\| STMicroelectronics, via Ferrata 1, 27100 Pavia, Italy (Repossi, M.; Pozzoni, M.) \|\| Università di Modena e Reggio Emilia, via Vignolese 905, 41100, Italy (Mazzanti, A.)
Abstract	This paper presents a fully integrated receiver for mm-wave WLANs comprising LNA, RF mixer, quadrature IF mixers, local oscillator plus output stage for characterization, in 65 nm CMOS. The IF frequency set to 1/3 the RF frequency slides according to the received frequency. The architecture choice allows running the quadrature VCO around 20 GHz. A Phase Noise of −115 dBc/Hz @ 10 MHz offset from an equivalent LO at RF carrier is achieved with 36 mW power consumption and 12.5% frequency tuning range. The design of building blocks is discussed in details. Implemented prototypes use low-power digital devices and other measured performances are: 28 dB peak gain, 9 dB noise figure, 5 GHz RF bandwidth, −26 dBm 1-dB compression point, ≫ 60 dB IRR. Total Power consumption is 80 mW from 1.5 V supply.
Starting Page	669
Ending Page	672
File Size	1243228
Page Count	4
File Format	PDF
ISBN	9781424440719
DOI	10.1109/CICC.2009.5280754
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-09-13
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radio frequency Energy consumption Local oscillators Voltage-controlled oscillators Phase noise Tuning Prototypes Gain measurement Noise measurement Performance evaluation sliding-IF architecture mm-wave CMOS 60 GHz receivers
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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