NDLI: Implementation of bit-parallel lattice wave digital filters with increased maximal sample rate

Content Provider	IEEE Xplore Digital Library
Author	Ohlsson, H. Gustafsson, O. Johansson, H. Wanhammar, L.
Copyright Year	2001
Description	Author affiliation: Dept. of Electr. Eng., Linkoping Univ., Sweden (Ohlsson, H.)
Abstract	Arithmetic transformations for increased maximal sample rate of bit-parallel lattice wave digital filters implemented with carry-save arithmetic are proposed. The purpose is to increase the throughput in order to allow a reduction of the power consumption through supply voltage scaling. A lattice wave digital filter can be composed of first- and second-order allpass sections which are recursive structures. This sets a bound on the maximal sample rate. The proposed transformations reduce the latency of the critical loop by reordering of arithmetic operations. The resulting structure is numerically equivalent to the original structure. Hence, the favourable properties of lattice wave digital filters, such as guaranteed stability, low coefficient sensitivity, and good dynamic range, are retained. An example of a filter implementation where the proposed transformations are applied is presented. The maximal sample rate for this example was improved by about 40% at the expense of a 10% increase of the area.
Sponsorship	IEEE CAS Soc. Univ. Malta
Starting Page	71
Ending Page	74
File Size	346864
Page Count	4
File Format	PDF
ISBN	0780370570
DOI	10.1109/ICECS.2001.957672
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-09-02
Publisher Place	Malta
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Lattices Digital filters Digital arithmetic Throughput Energy consumption Power supplies Voltage Delay Stability Dynamic range
Content Type	Text
Resource Type	Article

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