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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hirano, T. Fukuda, K. Ito, K. Kiga, T. Taniguchi, Y. |
| Copyright Year | 2001 |
| Description | Author affiliation: Packaging Product Eng. Dept., Sony Corp., Tokyo, Japan (Hirano, T.) |
| Abstract | In the past few years, many studies have been reported on reliability of lead-free solder joint. Almost all of them have described evaluation of solder alloy composition of printed wiring board surface-finish. What seems to be lacking, however, is the influence of component placing condition to reliability and reliability under several stress conditions. The purpose of this work is to investigate the influence of the factor on reliability of the solder joint. We used chip size package as a test piece, which is a more popular semiconductor package, and thermal fatigue test and mechanical fatigue test were carried out. We choose experimental conditions as follow, solder materials (Sn-Ag-Cu, Sn-Ag-Cu-Bi, Sn-Zn-Bi, Sn-Pb), chip size package placing condition (on one side, on both sides), printed wiring board surface finish (organic solderability protector on Cu, Au plating). We got the result that chip size package placing condition, printed wiring board surface finish had more effect on reliability of the lead-free solder joint than solder materials. It is clear that placing condition and printed wiring board surface-finish greatly affects reliability of thermal fatigue and mechanical fatigue, respectively. In conclusion, the influence of the factor on reliability of lead-free solder joint was investigated from several points of view. The work helps us to clarify the influence of the factor on reliability of lead-free solder joint and lead to the guidelines for introduction of lead-free solder. |
| Sponsorship | IEEE Comput. Soc., Tech. Committe on Electron. & the Environ |
| Starting Page | 285 |
| Ending Page | 289 |
| File Size | 428263 |
| Page Count | 5 |
| File Format | |
| ISBN | 0780366557 |
| ISSN | 10952020 |
| DOI | 10.1109/ISEE.2001.924541 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-05-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Environmentally friendly manufacturing techniques Lead Soldering Wiring Fatigue Semiconductor device packaging Semiconductor device testing Surface finishing Thermal stresses Organic materials |
| Content Type | Text |
| Resource Type | Article |
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