NDLI: Effects of grain boundaries on TFTs formed by high-temperature MILC

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Effects of grain boundaries on TFTs formed by high-temperature MILC

Content Provider	IEEE Xplore Digital Library
Author	Zhikuan Zhang Hongmei Wang Mansun Chan Jagar, S. Poon, M.C. Ming Qin Yangyuan Wang
Copyright Year	2000
Description	Author affiliation: Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China (Zhikuan Zhang)
Abstract	The effects of grain boundaries on the performance of super TFTs formed by MILC are studied. The existence of grain boundaries in the channel region will cause subthreshold hump, early punchthrough or device degradation, depending on the direction of the grain boundaries. The probability for the channel region of a TFT to cover multiple grains decrease significantly when the device is scaled down, thus resulting in better device performance and higher uniformity. A novel method to measure the grain dimension by using boundaries oxide as a etching mask has also been developed.
Starting Page	68
Ending Page	71
File Size	610699
Page Count	4
File Format	PDF
ISBN	0780363043
DOI	10.1109/HKEDM.2000.904218
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-06-24
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Grain boundaries Thin film transistors Temperature Grain size Annealing Silicon on insulator technology Isolation technology Amorphous silicon Crystallization Microelectronics
Content Type	Text
Resource Type	Article

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