NDLI: Thermal analysis and optimization of 2.5-D integrated voltage regulator

Content Provider	IEEE Xplore Digital Library
Author	Taigon Song Sturcken, N. Athikulwongse, K. Shepard, K. Sung Kyu Lim
Copyright Year	2012
Description	Author affiliation: Department of EE, Columbia University, New York, NY 10027, U.S.A. (Sturcken, N.; Shepard, K.) \|\| Department of ECE, Georgia Institute of Technology, Atlanta, GA 30332, U.S.A. (Taigon Song; Athikulwongse, K.; Sung Kyu Lim)
Abstract	Integrated voltage regulators (IVRs) promise to improve performance-per-watt for microprocessors and systems-on-chip by reducing supply voltage margins, resistive losses in the power distribution network, and by enabling power management with greater temporal resolution. However, the thermal impact of IVRs has not been well studied, and the methodologies for thermal analysis of analog/digital mixed-signal designs, such as voltage regulators on chip, have not yet been developed. In this paper, we present a thermal analysis methodology for 2.5-D IVR. Our results show that (1) the integrated power inductor is the hottest component in the IVR, and (2) the temperature of the IVR rises rapidly when the power inductor and the circuitries of the IVR chip overlap. In order to address these issues, we propose two design optimization techniques: design block relocation and inductor spreading. Related experiments show the effectiveness of these methods.
Starting Page	25
Ending Page	28
File Size	1407857
Page Count	4
File Format	PDF
ISBN	9781467325394
e-ISBN	9781467325387
e-ISBN	9781467325370
DOI	10.1109/EPEPS.2012.6457835
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-10-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Inductors Thermal analysis Silicon Integrated circuits Heating Voltage control Regulators Silicon Interposer Integrated Voltage Regulator Thermal Analysis Analog Mixed System
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering $10.8A/mm^{2}$

Thermal Analysis and Optimization of 2.5-D Integrated Voltage Regulator

Thermal analysis and optimization of 2.5-D integrated voltage regulator

Analysis of Wireless Power Transfer system design on active silicon interposer for low voltage applications in 3D-IC

Hybrid silicon and glass interposer for combined optical and memory system-in-package

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

Failure analysis of digital-analog mixed integrated circuit at high temperature

Thermal analysis and optimization of 2.5-D integrated voltage regulator

Similar Documents

A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering $10.8A/mm^{2}$

Thermal Analysis and Optimization of 2.5-D Integrated Voltage Regulator

Thermal analysis and optimization of 2.5-D integrated voltage regulator

Analysis of Wireless Power Transfer system design on active silicon interposer for low voltage applications in 3D-IC

Hybrid silicon and glass interposer for combined optical and memory system-in-package

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

Failure analysis of digital-analog mixed integrated circuit at high temperature

Thermal analysis and optimization of 2.5-D integrated voltage regulator