NDLI: A hardware test platform in field-programmable logic for parallelized digital signal processing

Content Provider	IEEE Xplore Digital Library
Author	Sokalski, T. Manjikian, N.
Copyright Year	2013
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Queen's Univ., Kingston, ON, Canada (Manjikian, N.) \|\| Dept. of Math. & Stat., Queen's Univ., Kingston, ON, Canada (Sokalski, T.)
Abstract	This paper describes the development and application of a self-contained platform to support hardware implementation and testing of components and systems for parallelized digital signal processing in field-programmable gate-array (FPGA) logic chips. To more closely reflect the usage of parallelized components in actual applications, high-speed input/output pins of FPGA chips are utilized in a loopback configuration so that parallel streams of representative digitized complex fixed-point data are fed as input to a system under test. Onchip FPGA memory is used to implement high-speed FIFO buffers connected to the system under test. On-chip memory is also used to stage data for the input FIFO buffer feeding the system under test and to collect processed data from the output FIFO buffer. An embedded processor executes software used to perform data transfers between the FIFO buffers and staging memory, and to initiate full-speed operation for a system under test with data flowing through the external loopback connection. This paper also provides sample results from a representative parallelized finite-impulse-response filter tested using the hardware platform described in this paper.
Starting Page	1
Ending Page	5
File Size	1299743
Page Count	5
File Format	PDF
ISBN	9781479900312
ISSN	08407789
e-ISBN	9781479900336
e-ISBN	9781479900329
DOI	10.1109/CCECE.2013.6567731
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-05-05
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Pins Hardware System-on-chip Software tools Computers Finite impulse response filters systolic arrays field-programmable gate arrays digital signal processing finite impulse response filter
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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