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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Antoun, G. El-Nozahi, M. Fikry, W. Abbas, H. |
| Copyright Year | 2003 |
| Description | Author affiliation: Mentor Graphics Corp., Cairo, Egypt (Antoun, G.) |
| Abstract | New transistor models are becoming more complex to accommodate the new effects introduced by shrinking channel length and new fabrication structures. Conventional parameter extraction techniques perform poorly when applied to these new models. In this paper, a new hybrid evolutionary algorithm is adopted in order to address the problems normally encountered in conventional algorithms and to obtain accurate parameter values. The algorithm relies on applying genetic algorithms (GA) in order to reach a near-optimal solution then a conventional least squares optimization process is applied to find the optimal parameter set. The proposed algorithm has outperformed both conventional parameter extraction techniques and pure GA-based ones. The proposed hybrid algorithm was tested on the available data for different 12 NMOS devices of different gate lengths and widths for the 0.35 mm technology. The evolutionary algorithm resulted in RMS fitting errors in the range form 0.5% to 1.5% compared to a value of 4% error when conventional parameter extraction techniques were applied. |
| Starting Page | 1111 |
| Ending Page | 1114 |
| File Size | 290370 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780377818 |
| ISSN | 08407789 |
| DOI | 10.1109/CCECE.2003.1226091 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-05-04 |
| Publisher Place | Canada |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Genetic algorithms MOSFET circuits Parameter extraction Evolutionary computation Transistors Fabrication Least squares methods Testing MOS devices Fitting |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture |
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