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Content Provider | IEEE Xplore Digital Library |
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Author | Yuping Ding Xining Li |
Copyright Year | 1998 |
Description | Author affiliation: Dept. of Comput. Sci., Lakehead Univ., Thunder Bay, Ont., Canada (Yuping Ding) |
Abstract | The paper presents the cache performance analysis of the Chronological Garbage Collection algorithm used in the LVM system. The LVM is a new Logic Virtual Machine for Prolog. It adopts one stack policy for all dynamic memory requirements and cooperates with an efficient garbage collection algorithm, Chronological Garbage Collection to recuperate space, not as deliberate garbage collection operation but as a natural activity of the LVM engine to gather useful objects. This algorithm takes advantages of the traditional copying, mark-compact, generational, and incremental garbage collection schemes. In order to determine the improvement of cache performance under our garbage collection algorithm, we developed an emulator to do the trace driven cache simulation. Direct mapped cache and set-associative cache with different cache sizes, block sizes and set associativities are simulated and measured. The objectives of this simulation are to verify and validate our experimental results, and to find important factors which influence the performance of the CGC algorithm. |
Starting Page | 1 |
Ending Page | 4 |
File Size | 487591 |
Page Count | 4 |
File Format | |
ISBN | 078034314X |
ISSN | 08407789 |
DOI | 10.1109/CCECE.1998.682534 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1998-05-25 |
Publisher Place | Canada |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Algorithm design and analysis Engines Size measurement Computer science Lakes Performance analysis Semiconductor device measurement Logic programming Functional programming Data structures |
Content Type | Text |
Resource Type | Article |
Subject | Electrical and Electronic Engineering Hardware and Architecture |
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