NDLI: Generating a fault tolerant global clock in a high speed distributed system

Content Provider	IEEE Xplore Digital Library
Author	Ofek, Y.
Copyright Year	1989
Description	Author affiliation: IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA (Ofek, Y.)
Abstract	A technique is described for constructing a fault-tolerant global clock in a point-to-point distributed system with an arbitrary topology, which constitutes a wide-area network. It is assumed that the network is constructed of optical links with very high transmission rates. The approach used is to generate a global clock from the ensemble of the local transmission clocks, and not to synchronize these high-speed clocks directly. The steady-state algorithm which generates the global system clock is executed in hardware by the network interface of each node. As a result, it is possible to estimate accurately intermodal delays and thereby to achieve a much tighter synchronization than with other methods. The basic synchronization time step is proportional to the error or uncertainty in the measurement of the end-to-end network delay rather than to the actual value of the end-to-end network delay. Node and network models are presented, and the synchronization condition is defined. The synchronization algorithm, its bound, and its correctness proof are presented. A procedure is described for detecting and isolating a faulty component, while maintaining the integrity of the global clock.<>
Starting Page	218
Ending Page	226
File Size	672663
Page Count	9
File Format	PDF
ISBN	0818619538
DOI	10.1109/ICDCS.1989.37950
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-06-05
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Clocks Synchronization Delay estimation Delay effects Fault tolerant systems Network topology Optical fiber communication Steady-state Hardware
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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