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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Rosenband, D.L. Arvind |
| Copyright Year | 2004 |
| Description | Author affiliation: Massachusetts Institute of Technology, USA (Rosenband, D.L.) |
| Abstract | A modular synthesis flow is essential for a scalable and hierarchical design methodology. This paper considers a particular modular flow where each module has interface methods and the internal behavior of the module is described in terms of a set of guarded atomic actions on the state elements of the module. A module can also read and update the state of other modules but only by invoking the interface methods of those modules. This paper extends the past work on hardware synthesis of a set of guarded atomic actions by Hoe and Arvind to modules of such actions.: It presents an algorithm that, given the scheduling constraints on the interface methods of the called modules, derives the "glue logic" and the scheduling constraints for the interface methods of the calling module such that the atomicity of the guarded actions is preserved across module boundaries. Such modules provide reusable 1P which facilitates "correctness by construction" design methodology. It also reduces compile-times dramati$ally in comparison to the compilation that flattens all the modules first. |
| Starting Page | 55 |
| Ending Page | 60 |
| File Size | 504958 |
| Page Count | 6 |
| File Format | |
| ISBN | 1511838288 |
| ISSN | 0738100X |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2004-07-07 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Hardware design languages Processor scheduling Design methodology Permission Computer science Artificial intelligence Laboratories Scheduling algorithm Logic Modular construction |
| Content Type | Text |
| Resource Type | Article |
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