NDLI: An IDDQ sensor for concurrent timing error detection

Content Provider	IEEE Xplore Digital Library
Author	Knight, C.G. Singh, A.D. Nelson, V.P.
Copyright Year	1997
Description	Author affiliation: Dept. of Electr. Eng., Auburn Univ., AL, USA (Knight, C.G.)
Abstract	Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions are caused by transient faults which often manifest themselves as signal delays or other timing violations. We present a novel CMOS based concurrent error detection circuit that allows a flip flop (or other timing sensitive circuit element) to signal when its data has been potentially corrupted by a timing violation. Our circuit employs on-chip IDDQ evaluation to determine when the input changes in relation to a clock edge. If the input changes too close to clock time, the resulting switching transient current exceeds a reference threshold, and an error is flagged. We have designed, fabricated and evaluated a test chip that shows that such an approach can be used to effectively detect setup and hold time violations in clocked circuit elements.
Starting Page	281
Ending Page	289
File Size	552205
Page Count	9
File Format	PDF
ISBN	0818681683
ISSN	10636722
DOI	10.1109/DFTVS.1997.628335
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-10-20
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Timing Clocks Computer errors Circuit faults Circuit testing Error correction Electrical fault detection Fault detection Application software Delay
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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