NDLI: Achieving higher levels of electronic integration through system-on-chip

Content Provider	IEEE Xplore Digital Library
Author	Dent, D.
Copyright Year	2000
Description	Author affiliation: Fac. of Sci. Technol. & Design, Univ. of Luton, UK (Dent, D.)
Abstract	All aerospace vehicles have the common constraint of limited space for the electronic systems. The challenge has always been how to pack effective electronic systems into the space available. Higher levels of electronic integration can give a competitive advantage, for example by providing extra channels in a communications satellite thereby increasing revenue to the operator. Today's deep sub-micron manufacturing processes for integrated electronics offer an opportunity for a step change for electronic functionality that can packaged in a given space. This technology makes possible, for the first time, a true System-on-Chip approach to electronic systems, which is already being exploited by the commercial sector in products such as the mobile telephone.
Starting Page	451
Ending Page	458
File Size	710578
Page Count	8
File Format	PDF
ISBN	0780362624
DOI	10.1109/NAECON.2000.894945
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-10-12
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System-on-a-chip Space technology Consumer electronics Field programmable gate arrays Costs Time to market Artificial satellites Power system reliability Application specific integrated circuits Intellectual property
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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