NDLI: 4×4/8×8/12×12 reconfigurable MIMO detector on multi-core DSP based on Eigen decomposition of dataflow graph

Content Provider	IEEE Xplore Digital Library
Author	Sheng-Hung Wu Chien-Yu Kao Jen-Yuan Hsu Pang-An Ting Gwo-Giun Lee Yuan-Hao Huang
Copyright Year	2013
Description	Author affiliation: Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan (Sheng-Hung Wu; Yuan-Hao Huang) \|\| Ind. Technol. Res. Inst., Hsinchu, Taiwan (Chien-Yu Kao; Jen-Yuan Hsu; Pang-An Ting) \|\| Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan (Gwo-Giun Lee)
Abstract	This paper presents a 4×4/8×8/12×12 and QPSK/16-QAM/64-QAM reconfigurable MIMO detector on a multi-core DSP platform for different MIMO detection algorithms, including multiple-candidate-selection QRSIC (MCS-QRSIC), distributed K-best, and sorting-reduced K-best detectors. This study uses an Eigen-value decomposition method to investigate the intrinsic degree of parallelism of MIMO detectors and allocate the processing elements to DSP cores. MCS-QRSIC outperforms other detectors in 4 × 4 detection, and distributed K-best has the best performance in 8×8 and 12×12 MIMO systems. The normalized throughput achieves 188/153/142 Mbps for 64-QAM 4×4/8×8/12×12 MIMO detections at a 1GHz clock rate with 448 cores.
Starting Page	2639
Ending Page	2643
File Size	294146
Page Count	5
File Format	PDF
ISBN	9781479903566
ISSN	15206149
DOI	10.1109/ICASSP.2013.6638134
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-05-26
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MIMO Detectors Parallel processing Detection algorithms Sorting Laplace equations Digital signal processing
Content Type	Text
Resource Type	Article

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