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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sousa, L. |
| Copyright Year | 2007 |
| Description | Author affiliation: TULisbon, Lisbon (Sousa, L.) |
| Abstract | The non-positional nature of residue number systems (RNS) is very useful to achieve carry free arithmetic. However it makes the comparison of numbers more difficult than in the traditional weighted number systems: there is no any efficient general method for magnitude comparison in RNS. Moreover, magnitude comparison for RNS that rely on pairs of conjugate moduli, which are not relatively prime moduli sets recently proposed because of the large dynamic ranges and the simplicity of the arithmetic units, is a new unsolved problem. In this paper an efficient method and a VLSI architecture is proposed for magnitude comparison in RNS based on sets formed by two pairs of conjugate moduli. This proposed method is much more efficient than the other known ones and is the only one valid for moduli sets not formed by relatively prime integers. The method has been applied to design a very fast Sum-of-Absolute Differences (SAD) unit for motion estimation in video sequences that performs the function entirely within the RNS channels. Experimental results show that this new SAD unit, implemented in the internal memory blocks of the xc2vp50-7 FPGA, is capable of achieving the high throughput required to perform real-time motion estimation in high resolution images. |
| Starting Page | 240 |
| Ending Page | 250 |
| File Size | 253060 |
| Page Count | 11 |
| File Format | |
| ISBN | 0769528546 |
| ISSN | 10636889 |
| DOI | 10.1109/ARITH.2007.16 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-06-25 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Very large scale integration Cathode ray tubes Motion estimation Image converters Computer architecture Digital arithmetic Dynamic range Video sequences Field programmable gate arrays Throughput |
| Content Type | Text |
| Resource Type | Article |
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