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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Li, R.-C. Boldo, S. Daumas, M. |
| Copyright Year | 2003 |
| Description | Author affiliation: Dept. of Math., Kentucky Univ., Lexington, KY, USA (Li, R.-C.) |
| Abstract | A commonly used argument reduction technique in elementary function computations begins with two positive floating point numbers /spl alpha/ and /spl gamma/ that approximate (usually irrational but not necessarily) numbers 1/C and C, e.g., C = 2/spl pi/ for trigonometric functions and ln 2 for e/sup x/. Given an argument to the function of interest it extracts z as defined by x/spl alpha/ = z + /spl sigmav/ with z = k2/sup -N/ and |sigmav;| /spl les/ 2/sup -N-1/, where k, N are integers and N /spl ges/ 0 is preselected, and then computes u = x - z/spl gamma/. Usually z/spl gamma/ takes more bits than the working precision provides for storing its significant and thus exact x - z/spl gamma/ may not be represented exactly by a floating point number of the same precision. This will cause performance penalty when the working precision is the highest available on the underlying hardware and thus considerable extra work is needed to get all the bits of x - z/spl gamma/ right. We present theorems that show under mild conditions that can be easily met on today's computer hardware and still allow /spl alpha/ /spl ap/ 1/C and /spl gamma/ /spl ap/ C to almost the full working precision, x - z/spl gamma/ is a floating point number of the same precision. An algorithmic procedure based on the theorems is obtained. The results will enhance performance, in particular on machines that has hardware support for fused multiply-add (fma) instruction(s). |
| Sponsorship | IEEE Comput. Soc. Tech. Committee on VLSI |
| Starting Page | 129 |
| Ending Page | 136 |
| File Size | 298113 |
| Page Count | 8 |
| File Format | |
| ISBN | 076951894X |
| ISSN | 10636889 |
| DOI | 10.1109/ARITH.2003.1207670 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-06-15 |
| Publisher Place | Spain |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Hardware Computer aided instruction Mathematics Polynomials Engineering profession Reduced instruction set computing Digital arithmetic |
| Content Type | Text |
| Resource Type | Article |
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