NDLI: HDTV is the slogan, high volume-high tech is the issue

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Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage

Fujitsu VP2000 series

The CRAY Y-MP: a user's viewpoint

The ES-1: a supercomputing architecture for the 1990s

The MasPar MP-1 architecture

The design of the MasPar MP-1: a cost effective massively parallel computer

Software to support massively parallel computing on the MasPar MP-1

Designing a VAX for high performance

Micro-architecture of the VAX 9000

VAX 9000 packaging-the multi chip unit

Design of scalable shared-memory multiprocessors: the DASH approach

High-speed networks for high-performance computing

MERLIN. A superglue for multicomputer systems

A user's view of dataflow architectures

The Epsilon-2 hybrid dataflow architecture

Data-driven approach for programming a transputer-based system

Host interface design for experimental, very high-speed networks

VAX 6000 model 400 system overview

A VLSI implementation of the VAX vector architecture

Vector extensions to the VAX architecture

VAX 6000 Model 400 performance

A VLSI-intensive fault-tolerant computer architecture

An object-oriented distributed operating system

High performance issue oriented architecture

An IBM second generation RISC processor architecture

IBM second-generation RISC machine organization

New micro channel features

Sun's SPARCstation 1: a workstation for the 1990s

The SBus: Sun's high performance system bus for RISC workstations

Software in silicon: the methodology behind Sun's GX graphics accelerator architecture

Approaching the desktop supercomputer

Achieving supercomputer performance in a low pain environment

Why MIPS aren't the point

System issues in embedded control

Multiprocessing: an extension of distributed, real-time computing

Is it possible to quantify the fault tolerance of distributed/parallel computer systems

An ECL RISC microprocessor designed for two level cache

The i960CA SuperScalar implementation of the 80960 architecture

The execution pipeline of the Intel i486 CPU

RISC performance pushes back: A perspective on performance limits in general-purpose applications

The i486 microprocessor integrated cache and bus interface

The 68040 integer and floating-point units

The 68040 on-chip memory subsystem

Software considerations for real-time RISC

Using pSOS/sup +/ for embedded real-time computing

A RISC development case study

New generations of the 29 K family solutions

Headroom and legroom in the 80960 architecture

Designing embedded control applications with the IDT79R3001

X window system servers in embedded systems

Microprocessor performance issues in non-impact printer applications

Object-oriented systems analysis and specification: a model-driven approach

A methodology for design and documentation of persistent object bases of information systems

Reuse in software engineering: an object-oriented perspective

An object-oriented application development environment

An integrated C programming environment

Using transactions in distributed applications

Integrated support for distributed object-oriented applications

Improving user-interface responsiveness despite performance limitations

MOPPS: a scheme for managing parallel scientific programs in a distributed architecture

Analysis vs. presentation in data visualization software

Organizing design alternatives using VHDL configurations

VHDL as a modeling-for-testability tool

Behavioral synthesis of testable systems with VHDL

Emulating peripheral chips using a RISC core

CREATE-LIFE: a modular design approach for high performance ASICs

AEDAM: design of high performance multi-process systems

CrossCheck: an ASIC testability solution

Sequential circuit testing

SSC-a tool for the synthesis of testable sequential machines

MAX EPLDs offer fast alternatives to ASICs

System development using Actel field programmable gate arrays

Field programmable gate arrays get enough speed and density for computer applications

Parallel query execution in NonStop SQL

Parallelism with IBM's relational Database2 (DB2)

Parallelizing the Volcano database query processor

The theory of deductive database systems

Architecture of deductive database systems

Applications of deductive database systems

An object-oriented knowledge base approach to a next generation of hypermedia system

Comparative analysis of RDBMS and OODBMS: a case study

Integrating natural language, query processing, and semantic data models

HDTV is the slogan, high volume-high tech is the issue

New paradigms for visualization

Increasing the human-computer bandwidth

Tandem's remote data facility

Design approaches for real-time transaction processing remote site recovery

Issues in disaster recovery

Parallel structuring of real-time simulation programs

PAT: interactive conversion of sequential to parallel Fortran

Architecture of the Parallel Programming Support Environment

In the beginning (mathematics courses)

We're all the same (women in engineering)

Corporate tactics which develop the engineering resource pool

Pocket intelligence: the next plateau

Modern virtual screen technology and applications

The personal information revolution: from portable computing to the intelligent pocket assistant

Practical parallel Fortran

Compile-time instruction scheduling for superscalar processors

Exploiting multiple granularities of parallelism in a compiler

COMPCON Spring '90: Thirty-Fifth IEEE Computer Society International Conference. Intellectual Leverage. Digest of Papers. (Cat. No.90CH2843-1)

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HDTV is the slogan, high volume-high tech is the issue

Content Provider	IEEE Xplore Digital Library
Author	Borrus, M.
Copyright Year	1990
Description	Author affiliation: California Univ., Berkeley, CA, USA (Borrus, M.)
Abstract	High-definition television (HDTV) is a central concern for US business and policy: US high-tech preeminence cannot be sustained without participation in high-volume markets for high-technology products. High-volume markets are increasingly driving sophisticated component quality and cost, which threatens even the ability of preeminent US computer companies to control their own technological destiny. The US failure to participate in high-volume, high-tech markets carries several risks that intensify as high-volume products become ever more sophisticated. It is argued that, before embarking on an ad-hoc HDTV policy that is uncoordinated with other needs, US policy makers ought to consider the underlying problem. An American HDTV initiative should be only one small part of a more comprehensive infrastructure strategy.<>
Starting Page	548
Ending Page	549
File Size	201395
Page Count	2
File Format	PDF
ISBN	0818620285
DOI	10.1109/CMPCON.1990.63736
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-02-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	HDTV Electronics industry Consumer electronics Industrial electronics Costs Silicon TV Computer industry Mass production Liquid crystal displays
Content Type	Text
Resource Type	Article

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