NDLI: AEDAM: design of high performance multi-process systems

Content Provider	IEEE Xplore Digital Library
Author	van der Meulen, P.S. Baltus, P. Morley, R.P.
Copyright Year	1990
Description	Author affiliation: Philips Res. & Dev. Center, Sunnyvale, CA, USA (van der Meulen, P.S.; Baltus, P.; Morley, R.P.)
Abstract	AEDAM (Architecture Exploration and Design system for Application-specific Multiprocesses) is a research project investigating methods to achieve very-high-performance, application-specific, real-time control systems, like automotive, HDTV image processing, and IO controller systems. The project is investigating architectures and implementations for such systems, as well as design tools to develop applications. AEDAM architectures are dedicated networks of processes. Processes can be implemented at any of the following upward compatible levels: the lowest level. Level 9, defines stateless logic. Level 1 is described by a single state vector, similar to a typical state machine. Level 2, the highest level defined yet, consists of a processor architecture with separate data and program storage. The AEDAM system allows multiple Level 2 implementations to be explored. Each of the AEDAM system components that were implemented in Smalltalk and the multiple implementations of processes which may be used in an AEDAM application are discussed. Some application areas and designs are investigated.<>
Starting Page	434
Ending Page	441
File Size	555549
Page Count	8
File Format	PDF
ISBN	0818620285
DOI	10.1109/CMPCON.1990.63720
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-02-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Gas discharge devices Prototypes Real time systems Control systems Circuit synthesis Logic design Design automation Protocols Working environment noise Automotive engineering
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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