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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Menon, J. Riegel, J. Wyllie, J. |
| Copyright Year | 1995 |
| Description | Author affiliation: IBM Almaden Res. Center, San Jose, CA, USA (Menon, J.; Riegel, J.; Wyllie, J.) |
| Abstract | RAIDs implemented in disk controllers are called hardware RAIDs. A software RAID, on the other hand, is implemented purely in software running on a host computer. In this paper, we describe algorithms that can be used by software RAIDs. We present one algorithm (parallel algorithm) for achieving fastest possible RAID update response time; we present one algorithm (PGS bit map algorithm) for improved recovery times; we present one algorithm for improved update concurrency; and we present four algorithms (Parity Caching, Delta Parity Caching, Delta Parity and Partial Parity Caching, and Data Prefetching) for improved sequential performance. Many of our algorithms are also appropriate for low-cost hardware RAIDs. |
| Starting Page | 411 |
| Ending Page | 419 |
| File Size | 758791 |
| Page Count | 9 |
| File Format | |
| ISBN | 0818670290 |
| ISSN | 10636390 |
| DOI | 10.1109/CMPCON.1995.512417 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1995-03-05 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Software algorithms Hardware Writing Read-write memory Optical computing Random access memory Nonvolatile memory Software performance Computer crashes Concurrent computing |
| Content Type | Text |
| Resource Type | Article |
| Subject | Hardware and Architecture |
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