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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chlamtac, I. Wong, E.W.M. |
| Copyright Year | 1992 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA (Chlamtac, I.; Wong, E.W.M.) |
| Abstract | The authors propose methods for controlling the flow of traffic in gateways and evaluate their performance. A gateway can interconnect several LANs over a high-speed interconnecting backbone, in which case every LAN has a set of buffers assigned for input and output, respectively. System configurations are investigated where packet transfer times over the interconnecting backbone are negligible. The gateway control consists of a policy which determines when a packet from an input LAN buffer is allowed to be transferred to the output LAN buffer. An associated strategy determines from which input LAN buffer to transfer a packet at that time. Alternative strategies and policies are studied, and the optimal control of gateways is defined. An analytical model is introduced, showing the interconnected system performance in terms of throughput, packet loss probability, and the average packet delay for the optimal and other types of control.< |
| Starting Page | 1190 |
| Ending Page | 1195 |
| File Size | 524768 |
| Page Count | 6 |
| File Format | |
| ISBN | 078030599X |
| DOI | 10.1109/ICC.1992.268127 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1992-06-14 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | LAN interconnection Local area networks Spine Delay Optimal control Bandwidth Analytical models Interconnected systems Contracts Traffic control |
| Content Type | Text |
| Resource Type | Article |
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