NDLI: Performance models for ATM switching of mixed continuous-bit-rate and bursty traffic with threshold-based discarding

Content Provider	IEEE Xplore Digital Library
Author	Yegani, P.
Copyright Year	1992
Description	Author affiliation: IBM Networking Syst., Research Triangle Park, NC, USA (Yegani, P.)
Abstract	An exact performance analysis of an asynchronous transfer mode (ATM) statistical multiplexer whose inputs consist of superposition of mixed continuous-bit-rate and bursty traffic is presented. Two priority levels are considered for each class of traffic. ATM cells arriving at the multiplexer are generated according to a Markov modulated Poisson process. The performance of the multiplexer for different classes of traffic was investigated. The quality of service required for each class is met by introducing selective cell discarding using a partial buffer sharing scheme. The performance of the multiplexer for both deterministic and exponential service distributions was investigated. The results indicate that the deterministic service compared to the exponential service shows better performance in the same traffic environment. It is shown that for heavy load situations the exponential service requires less buffer space than the deterministic service. It is also shown that the loss probability obtained under the deterministic service is about one order of magnitude lower than that of the exponential service.<>
Starting Page	1621
Ending Page	1627
File Size	664263
Page Count	7
File Format	PDF
ISBN	078030599X
DOI	10.1109/ICC.1992.268018
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1992-06-14
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Asynchronous transfer mode Traffic control Multiplexing Quality of service Telecommunication traffic Performance analysis Delay Aggregates B-ISDN Probability
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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