NDLI: GGAS: Global GPU address spaces for efficient communication in heterogeneous clusters

Content Provider	IEEE Xplore Digital Library
Author	Oden, L. Froning, H.
Copyright Year	2013
Description	Author affiliation: Fraunhofer Inst., Univ. of Heidelberg, Heidelberg, Germany (Oden, L.) \|\| Univ. of Heidelberg, Heidelberg, Germany (Froning, H.)
Abstract	Modern GPUs are powerful high-core-count processors, which are no longer used solely for graphics applications, but are also employed to accelerate computationally intensive general-purpose tasks. For utmost performance, GPUs are distributed throughout the cluster to process parallel programs. In fact, many recent high-performance systems in the TOP500 list are heterogeneous architectures. Despite being highly effective processing units, GPUs on different hosts are incapable of communicating without assistance from a CPU. As a result, communication between distributed GPUs suffers from unnecessary overhead, introduced by switching control flow from GPUs to CPUs and vice versa. Most communication libraries even require intermediate copies from GPU memory to host memory. This overhead in particular penalizes small data movements and synchronization operations, reduces efficiency and limits scalability. In this work we introduce global address spaces to facilitate direct communication between distributed GPUs without CPU involvement. Avoiding context switches and unnecessary copying dramatically reduces communication overhead. We evaluate our approach using a variety of workloads including low-level latency and bandwidth benchmarks, basic synchronization primitives like barriers, and a stencil computation as an example application. We see performance benefits of up to 2× for basic benchmarks and up to 1.67× for stencil computations.
Sponsorship	IEEE Comput. Soc.
Starting Page	1
Ending Page	8
File Size	1200325
Page Count	8
File Format	PDF
ISBN	9781479908981
DOI	10.1109/CLUSTER.2013.6702638
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Graphics processing units Indexes Acceleration Benchmark testing Message systems Kernel Instruction sets bulk-synchronous execution parallel processing hybrid computing clusters GPU communication
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Efficient parallel GPU algorithms for BDD manipulation

GGAS: Global GPU Address Spaces for Efficient Communication in GPU Clusters

Energy-Efficient Stencil Computations on Distributed GPUs Using Dynamic Parallelism and GPU-Controlled Communication

A Simulation Framework for Efficient Resource Management on Hybrid Systems

Exploring Parallel Programming Models for Heterogeneous Computing Systems

Evaluating the potential of graphics processors for high performance embedded computing

Acceleration of spatial channel model simulation using GPU

Exploiting concurrent kernel execution on graphic processing units

Study of GPU scalability

GGAS: Global GPU address spaces for efficient communication in heterogeneous clusters

Similar Documents

Efficient parallel GPU algorithms for BDD manipulation

GGAS: Global GPU Address Spaces for Efficient Communication in GPU Clusters

Energy-Efficient Stencil Computations on Distributed GPUs Using Dynamic Parallelism and GPU-Controlled Communication

A Simulation Framework for Efficient Resource Management on Hybrid Systems

Exploring Parallel Programming Models for Heterogeneous Computing Systems

Evaluating the potential of graphics processors for high performance embedded computing

Acceleration of spatial channel model simulation using GPU

Exploiting concurrent kernel execution on graphic processing units

Study of GPU scalability

GGAS: Global GPU address spaces for efficient communication in heterogeneous clusters