NDLI: A 5/sup th/ order /spl Sigma//spl Delta/ modulator for GSM/WCDMA dual-standard wireless receivers

Content Provider	IEEE Xplore Digital Library
Author	Ling Zhang Bahar Jalali Franhani Ismail, M.
Copyright Year	2004
Description	Author affiliation: Ohio State Univ., Columbus, OH (Ling Zhang)
Abstract	A MASH 2-1-1-1 structure with a 5 level internal quantizer at the last stage is designed for a very-low-IF GSM/zero-IF WCDMA receiver. According to the different signal bandwidth and dynamic range requirements, this sigma delta modulator is reconfigured to achieve the required resolution with less power consumption. In GSM mode, only the first stage $(2^{nd}$ order SigmaDelta ADC) is turned on to achieve 76dB DR with oversampling ratio of 64 and bandwidth of 400kHz; in WCDMA mode, all the stages are turned on, together with a 5 level quantizer at the last stage, to achieve 66dB dynamic range with oversampling ratio of 8 and bandwidth of 5MHz. For other standards, like Bluetooth, Zig-bee, ADSL etc., this multi-standard SigmaDelta modulator can be easily reconfigured as MASH 2-1 or 2-1-1 structures to achieve different requirements from different standards. The design was implemented in TSMC 0.35mum CMOS process with 3.3V power supply
Sponsorship	IEEE Circuits and Syst. Soc. Arab Acad. for Sci. Technol. and Maritime Transport
Starting Page	64
Ending Page	67
File Size	1291272
Page Count	4
File Format	PDF
ISBN	0780382943
ISSN	15483746
DOI	10.1109/MWSCAS.2003.1562219
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-12-27
Publisher Place	Egypt
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delta modulation GSM Multiaccess communication Bandwidth Multi-stage noise shaping Dynamic range Delta-sigma modulation Signal resolution Energy consumption Bluetooth Switched-Capacitor GSM/WCDMA Multi-Standard ADC Sigma Delta Modulator
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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