NDLI: A 70-MHz continuous-time CMOS band-pass /spl Sigma//spl Delta/ modulator for GSM receivers

Content Provider	IEEE Xplore Digital Library
Author	Hsu, I. Luong, H.C.
Copyright Year	2000
Description	Author affiliation: Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China (Hsu, I.)
Abstract	A 70-MHz continuous-time CMOS band-pass /spl Sigma//spl Delta/ modulator for GSM receivers is presented. Impulse-invariant-transformation is used to transform a discrete-time loop-filter transfer function into continuous-time. The continuous-time loop-filter is implemented using a transconductor-capacitor (Gm-C) filter. A latched-type comparator and a true-single-phase-clock (TSPC) D flip-flop are used as the quantizer of the /spl Sigma//spl Delta/ modulator. Implemented in a MOSIS HP 0.5-/spl mu/m CMOS technology, the chip area is 857 /spl mu/m/spl times/420 /spl mu/m, and the total power consumption is 39 mW. At a supply voltage of 2.5 V, the maximum SNDR is measured to be 42 dB, which corresponds to a resolution of 7 bits.
Starting Page	750
Ending Page	753
File Size	397617
Page Count	4
File Format	PDF
ISBN	0780354826
DOI	10.1109/ISCAS.2000.856169
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-05-28
Publisher Place	Switzerland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delta modulation GSM Transfer functions Filters Frequency Circuits Sampling methods Delay Impedance Feedback
Content Type	Text
Resource Type	Article

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A 70-MHz continuous-time CMOS band-pass /spl Sigma//spl Delta/ modulator for GSM receivers