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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Loulou, M. Dallet, D. Marchegay, P. |
| Copyright Year | 2000 |
| Description | Author affiliation: Lab. de Microelectron., CNRS, Talence, France (Loulou, M.) |
| Abstract | This paper presents a low pass sigma-delta modulator (/spl Sigma//spl Delta/) for Analog-to-Digital conversion which uses the switched-current technique. The growth of this technique is limited by the clock feedthrough which induces an error on the output signal value. In order to cancel the effect of this phenomena a new method based on a current feedback loop is used. The /spl Sigma//spl Delta/ modulator implemented is a conventional second order and the whole circuit is designed with fully differential current mode building blocks. The circuit, designed in 0.8 /spl mu/m AMS single poly CMOS process, shows 55 dB dynamic range at 2 MHz sampling rate with 8 kHz input frequency bandwidth. |
| Starting Page | 409 |
| Ending Page | 412 |
| File Size | 351444 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780354826 |
| DOI | 10.1109/ISCAS.2000.858775 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-05-28 |
| Publisher Place | Switzerland |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Delta-sigma modulation Circuits Analog-digital conversion Clocks Feedback loop CMOS process Dynamic range Sampling methods Frequency Bandwidth |
| Content Type | Text |
| Resource Type | Article |
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