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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hao-Chieh Chang Liang-Gee Chen Yung-Chi Chang Sheng-Chieh Huang |
| Copyright Year | 1999 |
| Description | Author affiliation: Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan (Hao-Chieh Chang) |
| Abstract | An efficient architecture of variable length coding (VLC) is developed for recent multimedia applications, such as video and image compression. VLC plays a crucial part in these applications in that it provides a very effective coding gain. In this paper, we will describe an architecture design of VLC encoder. It can produce VLC codeword and amplitude, and pack them in order to achieve the constant word-length output. In addition, in this pipeline architecture, the VLC codeword and the amplitude can be processed in one clock cycle such that the input data rate of VLC encoder can reach as high as the sampling rate of video/image data. Therefore, it is very suitable for very high data rate video and image compression applications. |
| Starting Page | 398 |
| Ending Page | 401 |
| File Size | 601640 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780354710 |
| DOI | 10.1109/ISCAS.1999.780026 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1999-05-30 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Very large scale integration Image coding Video compression Clocks Concatenated codes Pipelines Image sampling Data compression Video coding MPEG 4 Standard |
| Content Type | Text |
| Resource Type | Article |
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