NDLI: 3D discrete wavelet transform architectures

Content Provider	IEEE Xplore Digital Library
Author	Weeks, M. Bayoumi, M.
Copyright Year	1998
Description	Author affiliation: Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA (Weeks, M.)
Abstract	Compression is a significant operation in many 3D data applications, such as magnetic resonance imaging (MRI), medical diagnosis, television, and seismic data. Employing standard 2D compression techniques do not offer efficient solutions in these applications. In this paper, a 3D discrete wavelet transform (DWT) approach is proposed for performing 3D compression. Two architectures are presented. The first architecture, called 3D-I, is a straight-forward implementation of the 3D DWT. It allows even distribution of the processing load onto 3 sets of filters, with each set doing the calculations for one dimension. The filters are easily scalable to a larger size. The control for this design is very simple, since the data are operated on in a row-column-slice fashion. The design is cascadable. Due to pipelining, all filters are utilized 100% of the time, except for the start up and wind-down times. The second proposed architecture, 3D-II, uses block inputs to reduce the amount of on-chip memory. It has a control unit to select which coefficients to pass on to the low and high pass filters. The RAM on the chip is small compared to the input size, since it depends solely on the filter sizes. The filters are parallel, since systolic filters assume that the data is fed in a non-block form such that partial calculations are done.
Starting Page	57
Ending Page	60
File Size	392600
Page Count	4
File Format	PDF
ISBN	0780344553
DOI	10.1109/ISCAS.1998.698757
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-05-31
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Discrete wavelet transforms Magnetic resonance imaging Low pass filters Image coding Discrete transforms Application software TV Read-write memory Wavelet analysis Computer architecture
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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