NDLI: A novel A/D converter for high-resolution and high-speed applications

Content Provider	IEEE Xplore Digital Library
Author	Ehsanian, M. Hamida, N.B. Kaminska, B.
Copyright Year	1997
Description	Author affiliation: Ecole Polytech., Montreal, Que., Canada (Ehsanian, M.)
Abstract	This paper describes a new and novel subranging analog-to-digital converter based on parallel comparison and subtraction. A high-resolution and high-speed converter has been achieved as a result of elimination of input sample-and-hold circuit and by performing subtraction and comparison operation simultaneously. The converter performs a 3-bits conversion followed by standard flash conversion, for example of 8-bits. The first 3-bit cell has been designed elaborately in order to minimize the errors in an entire A/D converter. A high speed subtracter which employed an operational amplifier with 90-dB DC gain and 900 MHz gain-bandwidth (GBW) and high speed and low offset comparator which uses self calibrating technique are presented. These circuits are designed in 0.8 /spl mu/m BiCMOS technology. In our implementation, A/D converter operates at 1 MHz with signal-to-noise ratio of 62 dB. The nonlinearity errors, INL and DNL, are less than 1 LSB in an 11-bit A/D converter The results show the possibility of increasing the resolution of 3-bits for any converter. So, a pre-processing stage is proposed for the resolution enhancement. Therefore, the A/D converter with resolution more than 15-bits is possible with this technique.
Starting Page	433
Ending Page	436
File Size	428413
Page Count	4
File Format	PDF
ISBN	078033583X
DOI	10.1109/ISCAS.1997.608760
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-06-12
Publisher Place	Hong Kong
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuits Signal resolution Switches Frequency conversion Analog-digital conversion Degradation Signal to noise ratio Signal processing Delay Switching converters
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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