NDLI: A BiCMOS upconverter with 1.9 GHz multiband frequency synthesizer for DVB-RCT application

Content Provider	IEEE Xplore Digital Library
Author	de Foucauld, E. Billiot, G. Mounet, C.
Copyright Year	2005
Description	Author affiliation: CEA-LETI, Grenoble, France (de Foucauld, E.; Billiot, G.; Mounet, C.)
Abstract	In this paper, we present an integrated upconversion stage including an integer-N synthesizer in a 0.35 /spl mu/m BiCMOS process. This chip is, to our knowledge, the first integrated circuit for a DVB-RCT application ever published. This standard requires 125 kHz frequency steps in the UHF band and an architecture is proposed to upconvert the 44 MHz IF signal. The realization of a converter stage, composed of a mixer and a synthesizer, based on a multiband VCO (voltage controlled oscillator), is also described. The mixer converts frequencies from 1080-1092 MHz to the UHF band (470-860 MHz). The synthesizer includes a programmable divider, with a dual modulus prescaler, and a multiband LC-VCO, which allows a frequency range of 1550-1952 MHz. A single side band phase noise of -84 dBc/Hz at 10 kHz offset and -122 dBc/Hz at 1 MHz offset have been measured at the synthesizer output. A power conversion gain of 7 dB and a noise figure of 14.9 dB characterize the mixer.
Sponsorship	IEEE Electron Devices Soc
Starting Page	244
Ending Page	247
File Size	1473797
Page Count	4
File Format	PDF
ISBN	0780393090
DOI	10.1109/BIPOL.2005.1555242
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-10-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	BiCMOS integrated circuits Frequency synthesizers Digital video broadcasting Mixers Voltage-controlled oscillators Frequency conversion Application specific integrated circuits Phase noise Noise measurement Phase measurement
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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