NDLI: Increased current gain and reduced emitter resistance in F-implanted, low thermal budget polysilicon emitters for SiGe HBTs

Content Provider	IEEE Xplore Digital Library
Author	Moiseiwitsch, N.E. Schiz, J.F.W. Marsh, C.D. Ashburn, P. Booker, G.R.
Copyright Year	1996
Description	Author affiliation: Dept. of Electron. & Comput. Sci., Southampton Univ., UK (Moiseiwitsch, N.E.)
Abstract	Low thermal budget polysilicon emitter contacts are reported for application in SiGe HBT processes. A fluorine implant into the polysilicon is shown to enhance the breakup of the interfacial oxide layer, and to significantly reduce the emitter resistance, when combined with anneals compatible with the fabrication of SiGe HBTs. If is shown using TEM that a 5/spl times/10/sup 15/ cm/sup -2/ fluorine implant, combined with an interface anneal of 30 seconds at 950/spl deg/C prior to emitter implant, and an emitter drive-in of 30 seconds at 900/spl deg/C, produces devices with a broken interfacial oxide layer. Similar control devices which did not receive a fluorine implant showed no signs of interfacial oxide break up. Emitter resistance measurements show that the specific interfacial resistivity falls from 114 for the control device to 17 /spl Omega/ /spl mu/m/sup 2/ for the device implanted with fluorine. Finally processing conditions are identified that allow low emitter resistance to be combined with a suppression of the base current.
Starting Page	177
Ending Page	180
File Size	518844
Page Count	4
File Format	PDF
ISBN	0780335163
ISSN	10889299
DOI	10.1109/BIPOL.1996.554641
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-09-29
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Thermal resistance Silicon germanium Germanium silicon alloys Annealing Implants Heterojunction bipolar transistors Contact resistance Temperature Fabrication Rapid thermal processing
Content Type	Text
Resource Type	Article

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