NDLI: The DTWP : An LPC based dynamic time warping processor for isolated word recognition

Content Provider	IEEE Xplore Digital Library
Author	Brown, M. Thorkildsen, R. Oh, Y. Ali, S.
Copyright Year	1984
Description	Author affiliation: Bell Laboratories, Murray Hill, New Jersey (Brown, M.)
Abstract	Special purpose hardware for calculating dynamic time warp distances has been designed and tested utilizing TTL technology. The "Dynamic Time Warp Processor" (DTWP) performs all of the necessary arithmetic and decision making operations for selecting a word from a given vocabulary based on log likelihood distance measurements. The speed limitation in previously designed hardware was due to programmed decision making (often referred to as combinatorics). The combinatorics have been implemented in hardware in such a way that the decisions are made in the time of several gate delays rather than the time of several program cycles. Thus, a dynamic time warp (DTW) is performed on typical 40 frame templates in less than one millisecond. The DTWP serves as a slave to a 16-bit microcomputer. It performs all of the computation and control necessary for pattern classification. A board level implementation is now operational. VLSI implementation of the processor is currently in progress. All logic has been designed in 2.5µm CMOS polycells and has been simulated on the MOTIS timing simulator. The timing simulations indicate that the DTW time of 1 msec implemented at the board level can also be met on the integrated circuit.
Starting Page	371
Ending Page	374
File Size	84548
Page Count	4
File Format	PDF
DOI	10.1109/ICASSP.1984.1172522
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1984-03-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Linear predictive coding Hardware Computational modeling Circuit simulation Decision making Combinatorial mathematics Timing Testing Isolation technology Performance evaluation
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

The DTWP: An LPC-based dynamic time-warping processor for isolated word recognition

REALIZATION AND DESIGN OF A PILOT ASSIST DECISION-MAKING SYSTEM BASED ON SPEECH RECOGNITION

On the use of the formant features in the dynamic time warping based recognition of isolated words (2007).

Comparison of DTW and HMM for isolated word recognition

Reducing computational complexity of dynamic time warping-based isolated word recognition with time scale modification

Reducing Computational Complexity of Dynamic Time Warping Based Isolated Word Recognition with Time Scale Modification (1998)

A connected digit recognizer based on dynamic time warping and isolated digit templates

Performance tradeoffs in dynamic time warping algorithms for isolated word recognition

Reducing Computational Complexity of Dynamic Time Warping Based Isolated Word Recognition with Time Scale Modification

The DTWP : An LPC based dynamic time warping processor for isolated word recognition

Similar Documents

The DTWP: An LPC-based dynamic time-warping processor for isolated word recognition

REALIZATION AND DESIGN OF A PILOT ASSIST DECISION-MAKING SYSTEM BASED ON SPEECH RECOGNITION

On the use of the formant features in the dynamic time warping based recognition of isolated words (2007).

Comparison of DTW and HMM for isolated word recognition

Reducing computational complexity of dynamic time warping-based isolated word recognition with time scale modification

Reducing Computational Complexity of Dynamic Time Warping Based Isolated Word Recognition with Time Scale Modification (1998)

A connected digit recognizer based on dynamic time warping and isolated digit templates

Performance tradeoffs in dynamic time warping algorithms for isolated word recognition

Reducing Computational Complexity of Dynamic Time Warping Based Isolated Word Recognition with Time Scale Modification

The DTWP : An LPC based dynamic time warping processor for isolated word recognition