NDLI: Parallel architectures for computing the Hough transform and CT image reconstruction

Content Provider	IEEE Xplore Digital Library
Author	Lin, L. Jain, V.K.
Copyright Year	1994
Description	Author affiliation: Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA (Lin, L.; Jain, V.K.)
Abstract	This paper discusses high-speed array implementations of two image processing algorithms, namely the 'Hough transform for detection of line segments', and 'backprojection in CT image reconstruction'. A multi-chip-module (MCM) construction is proposed consisting of three types of chips, a high speed multi-function nonlinear chip, a flexible multiply-accumulate chip, and an image kernel chip. Called V-array, it can be configured to have eight Hough modules, so as to produce the Hough transform of a 1024/spl times/1024 image in an estimated 13 ms in 2.0 micron CMOS technology (6.6 ms in 1.0 micron CMOS technology). Similarly, a V-array MCM can accommodate eight CT modules, which can produce the backprojected image in 209 ms in 2.0 micron CMOS technology (105 ms in 1.0 micron CMOS technology). To gain a significant speed advantage, we have developed an advanced multi-function cell for performing any one of four nonlinear operations: square-root, reciprocal, sine/cosine, and arctangent-all realized in a single chip, accessible on a selectable basis. A 16 bit four-function "one cycle" VLSI chip, fabricated in 2.0 micron CMOS technology, is presently available which outputs a new result every clock cycle. Using this nonlinear cell and two other cells, an application level Hough transform module and a CT module are presented.<>
Starting Page	152
Ending Page	163
File Size	530676
Page Count	12
File Format	PDF
ISBN	0818665173
ISSN	10636862
DOI	10.1109/ASAP.1994.331807
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-08-22
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Parallel architectures Concurrent computing CMOS technology Computed tomography Image processing Image segmentation Image reconstruction Kernel Performance gain Very large scale integration
Content Type	Text
Resource Type	Article
Subject	Computer Networks and Communications Hardware and Architecture

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