NDLI: Improved Application of Surge Capacitors for TRV Reduction When Clearing Capacitor Bank Faults

Content Provider	IEEE Xplore Digital Library
Author	Mysore, P.G. Mork, B.A. Bahirat, H.J.
Copyright Year	1986
Abstract	Current-limiting reactors are placed in series with capacitor banks to limit the rate of rise of current to the values specified in the circuit breaker (CB) standards. But this arrangement has created capacitor bank failures when attempting to clear faults in between the reactor and the capacitor bank. After detailed analyses of failures, solutions have been proposed by researchers: 1) Add a surge capacitor to ground on the capacitor bank side of the breaker and 2) add a surge capacitor across the reactor. These surge capacitors are sized based on the stray capacitances of the bus, the reactor, the circuit breaker, and on the maximum-available fault current at the substation. This paper presents a simplified means of sizing the surge capacitors for method 2), based only on the CB's interrupting current rating and reactor size. This eliminates the need for and uncertainty of stray capacitance values. Also, the design does not need to be revisited when grid enhancements increase the available fault current at a substation. A standard surge protection package, which can also be applied to existing installations, is proposed. This new approach has been verified with studies using Electromagnetic Transients Program/Alternative Transients Program.
Sponsorship	IEEE Power Engineering Society
Starting Page	2489
Ending Page	2495
Page Count	7
File Size	621478
File Format	PDF
ISSN	08858977
Volume Number	25
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Surges Capacitors Arresters Fault currents Transient analysis Current limiters transient recovery voltage Current limiting reactor inrush currents outrush currents
Content Type	Text
Resource Type	Article
Subject	Energy Engineering and Power Technology Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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