NDLI: Latency and Power Measurements on a 64-kb Hybrid Josephson-CMOS Memory

Content Provider	IEEE Xplore Digital Library
Author	Liu, Q. Fujiwara, K. Meng, X. Whiteley, S.R. Van Duzer, T. Yoshikawa, N. Thakahashi, Y. Hikida, T. Kawai, N.
Copyright Year	2002
Abstract	A 64-kbit sub-nanosecond Josephson-CMOS hybrid RAM memory is being developed with hybrid high-speed interface circuits. The hybrid memory is designed and fabricated using a commercially available 0.18 mum CMOS process and NEC-SRL's 2.5 kA/cm² Nb process for Josephson junctions. The memory bit-line output signals are detected by ultra-low power, high-speed Josephson devices. The most challenging part of the memory system is the input amplifier; the performance of this amplifier is optimized by minimizing its parasitic capacitance loading. Functionality tests were reported at the ASC 2004, high-speed measurements are the focus of this paper. Most of the power dissipation in the memory system occurs in the input interface circuits. The power dissipation and delay for the interface circuit are reported. The delay time and power dissipation of the CMOS part (including drivers, decoders, and cells), which contributes most to the total access time of the hybrid memory, are measured. The relation of measurements to simulations will be presented. Plans for future designs to reduce power dissipation and latency are described.
Sponsorship	Council on Superconductivity Appl. Superconductivity Conference Inc MIT
Starting Page	526
Ending Page	529
Page Count	4
File Size	540656
File Format	PDF
ISSN	10518223
Volume Number	17
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Power measurement Random access memory Power dissipation Circuits Read-write memory CMOS process Niobium Josephson junctions Signal detection interface circuit Access time high-speed measurement hybrid memory
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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