NDLI: The crosstie memory

Content Provider	IEEE Xplore Digital Library
Author	Schwee, L. Irons, H. Anderson, W.
Copyright Year	1965
Abstract	The crosstie memory stores information in magnetic domain walls in permalloy films about 350 Å thick. The domain walls are also used as shift register tracks. Serrated edges on narrow thin film permalloy strips are used to center a domain wall in each strip and to provide stable positions for crossties and Bloch lines. A magnetoresistance detector uses the same information bearing permalloy film as the magnetoresistive element. The entire crosstie memory can be fabricated on a silicon wafer or chip using conventional photolithographic procedures as are used in fabricating integrated circuits. Thus, a magnetic memory can be combined with semiconductor drivers, decoders, and sense amplifiers on the same chip. The memory is intended to serve as a block oriented random access memory (BORAM). Important background information such as static and dynamic stability conditions, Bloch line mobility, propagation and observation techniques are reviewed. Also, design goals and the role such device is expected to play in memory technology are presented. Anticipated performance includes a shift rate of 20 × 10⁶bits/sec, a bit density greater than 1.5 × 10⁵bits/cm², an operating temperature range from -50 °C to 100 °C, nonvolatility, low cost, and low power consumption.
Sponsorship	IEEE Magnetics Society
Starting Page	608
Ending Page	613
Page Count	6
File Size	907184
File Format	PDF
ISSN	00189464
Volume Number	12
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1976-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Magnetic domain walls Magnetic films Strips Magnetoresistance Shift registers Transistors Detectors Semiconductor films Silicon Magnetic memory
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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